clock_src_sc
Project Library Model Name Kind
sca_basic_libraries sources_sc clock_src_sc SystemC Module

Parameters

Name Type Default Description
high_level T {T}(1) high level value
low_level T {T}(0) low level value
period sc_core::sc_time sc_core::SC_ZERO_TIME clock period in absolute time units
start_time sc_core::sc_time sc_core::SC_ZERO_TIME time of the first clock edge
duty_cycle double 0.5 duty cycle (e.g. 0.5 = 50%)

Ports

Name Interface Type Description
clk_o sc_core::sc_out T clock output

Description

special clock source

Long Description

Discrete event module of a special clock source with an outport of an arbitrary type.

The parameter high_level (default: T(1)) specifies the value of the ON-level and the low_level (default: T(0)) the OFF-level. The parameter duty_cycle specifies the duty cycle for the clock in the range from 0.0 (always false - 0%) to 1.0 (always true 100%), default is 0.5 (50%). The parameter start_time specifies the time when the clock starts toggling and posedge_first if raising (default: true) or falling edge (false) is the first occured event.